The Systems Engineering Team is looking for dynamic and enthusiastic individuals to join our growing post-silicon validation team. The memory validation engineer is responsible to deliver post-silicon validation and characterization of various memory technologies (ie: GDDR6, HBM2) on Intel’s Arc Graphics GPUs. In this wide-ranging role, the memory validation engineer is the critical interface between DRAM architecture, memory controller design, PHY, and other cross-functional teams at Intel.
The memory validation engineer’s responsibilities would include pre-silicon planning in preparation for chip back, power-on activities such as ensuring memory can achieve target speeds, providing tuned memory settings to external teams, driving debug meetings with cross-functional teams and potentially the vendor.
Skills/experience:
Excellent debugging skills.
Willingness to drive resolution of critical problems under pressure.
Comprehend complex technical discussions, extract actions plans, and summarize complex details for executive reporting.
Knowledge of high-speed memory technologies and interface.
Experience working with DDR3, DDR4, LPDDR, GDDR5, GDDR6, HBM2 DRAM devices
Comfortable working in lab environment.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
The candidate should have a Bachelor’s Degree in Engineering, with 5+ years of experience in the semiconductor industry.
Experience with debugging memory-related issues
Knowledge with high-speed memory technologies and interfaces is required
Experience working with at least one of the following memory technologies is required: DDR3, DDR4, LPDDR, GDDR5, GDDR6, HBM2 DRAM devices
Preferred Qualifications:
2+ years of memory tuning experience in the graphics industry are preferred.
Experience with driving resolution of critical problems under pressure
Experience with complex technical discussions, providing actions plans, and summarizing complex details for executive reporting is desired
Experience in SoC validation and debug of memory sub-system.
Drive debug in post-silicon and root cause problems.
Hands-on experience in using JTAG, I2C, oscilloscope.
Strong programming skills (C/C++/Python).
Experience in developing test cases and scripts.
Behavioral traits that we are looking for:
Comfortable working in lab environment.
Work as a team and work efficiently in a fast-paced environment across multiple projects.
Collaborate and drive memory related issues across multi-functional teams.
Inside this Business Group
The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here
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