Job Description
Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel (https://www.youtube.com/c/Intel/videos) or the links below!
Life at Intel (https://www.intel.com/content/www/us/en/jobs/life-at-intel.html)
Diversity at Intel
The Intel Toronto office is dedicated to designing SerDes IP for use by customers that require flexible protocol support in addition to best-in-class performance and power. We have a long track record of silicon success over multiple technology nodes.
Responsibilities include but not are limited to:
Designing, developing, modifying and evaluate complex analog and mixed-signal electronic integrated circuitry.
Determining creative design approaches and parameters.
Designing complex circuit blocks with best-in-class power, performance, and area. Characterize this designed circuitry in the lab using test chip and product silicon.
Creating detailed documentation to enable co-ordination between analog, layout, digital, system, and lab teams as well as customer teams.
Providing schedule estimates for work on circuits blocks to enable project planning. Maintain familiarity with SerDes circuit design literature.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Must have a bachelor’s degree in electrical engineering or any STEM degree with over 3+ years of experience and master’s degree in electrical engineering or any STEM with over 2+ years of overall experience OR a PhD in Electrical Engineering or any STEM with analog and mixed-signal circuit design experience
2+ years of experience in one or more of the following:
Debugging, probing, and characterizing silicon using standard lab equipment.
Silicon manufacturing technology.
Tools for schematic entry, IC layout, and SPICE simulation.
Designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits
SerDes circuit design literature.
Preferred Qualifications:
Knowledge of VerilogA for analog behavioral modeling, TCL, Perl, C, python or other scripting languages.
Industry standard design conventions and rules in analog circuit design awareness of techniques to reduce design risk.
Inside this Business Group
IP Engineering Group’s (IPG) vision Build IPs that power Intel’s leadership products and power our customer’s silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel’s silicon design process. IPG’s guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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